PolarSSL v1.3.8
padlock.c
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1 /*
2  * VIA PadLock support functions
3  *
4  * Copyright (C) 2006-2014, Brainspark B.V.
5  *
6  * This file is part of PolarSSL (http://www.polarssl.org)
7  * Lead Maintainer: Paul Bakker <polarssl_maintainer at polarssl.org>
8  *
9  * All rights reserved.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or
14  * (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License along
22  * with this program; if not, write to the Free Software Foundation, Inc.,
23  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
24  */
25 /*
26  * This implementation is based on the VIA PadLock Programming Guide:
27  *
28  * http://www.via.com.tw/en/downloads/whitepapers/initiatives/padlock/
29  * programming_guide.pdf
30  */
31 
32 #if !defined(POLARSSL_CONFIG_FILE)
33 #include "polarssl/config.h"
34 #else
35 #include POLARSSL_CONFIG_FILE
36 #endif
37 
38 #if defined(POLARSSL_PADLOCK_C)
39 
40 #include "polarssl/padlock.h"
41 
42 #if defined(POLARSSL_HAVE_X86)
43 
44 /*
45  * PadLock detection routine
46  */
47 int padlock_supports( int feature )
48 {
49  static int flags = -1;
50  int ebx = 0, edx = 0;
51 
52  if( flags == -1 )
53  {
54  asm( "movl %%ebx, %0 \n\t"
55  "movl $0xC0000000, %%eax \n\t"
56  "cpuid \n\t"
57  "cmpl $0xC0000001, %%eax \n\t"
58  "movl $0, %%edx \n\t"
59  "jb unsupported \n\t"
60  "movl $0xC0000001, %%eax \n\t"
61  "cpuid \n\t"
62  "unsupported: \n\t"
63  "movl %%edx, %1 \n\t"
64  "movl %2, %%ebx \n\t"
65  : "=m" (ebx), "=m" (edx)
66  : "m" (ebx)
67  : "eax", "ecx", "edx" );
68 
69  flags = edx;
70  }
71 
72  return( flags & feature );
73 }
74 
75 /*
76  * PadLock AES-ECB block en(de)cryption
77  */
78 int padlock_xcryptecb( aes_context *ctx,
79  int mode,
80  const unsigned char input[16],
81  unsigned char output[16] )
82 {
83  int ebx = 0;
84  uint32_t *rk;
85  uint32_t *blk;
86  uint32_t *ctrl;
87  unsigned char buf[256];
88 
89  rk = ctx->rk;
90  blk = PADLOCK_ALIGN16( buf );
91  memcpy( blk, input, 16 );
92 
93  ctrl = blk + 4;
94  *ctrl = 0x80 | ctx->nr | ( ( ctx->nr + ( mode^1 ) - 10 ) << 9 );
95 
96  asm( "pushfl \n\t"
97  "popfl \n\t"
98  "movl %%ebx, %0 \n\t"
99  "movl $1, %%ecx \n\t"
100  "movl %2, %%edx \n\t"
101  "movl %3, %%ebx \n\t"
102  "movl %4, %%esi \n\t"
103  "movl %4, %%edi \n\t"
104  ".byte 0xf3,0x0f,0xa7,0xc8 \n\t"
105  "movl %1, %%ebx \n\t"
106  : "=m" (ebx)
107  : "m" (ebx), "m" (ctrl), "m" (rk), "m" (blk)
108  : "ecx", "edx", "esi", "edi" );
109 
110  memcpy( output, blk, 16 );
111 
112  return( 0 );
113 }
114 
115 /*
116  * PadLock AES-CBC buffer en(de)cryption
117  */
118 int padlock_xcryptcbc( aes_context *ctx,
119  int mode,
120  size_t length,
121  unsigned char iv[16],
122  const unsigned char *input,
123  unsigned char *output )
124 {
125  int ebx = 0;
126  size_t count;
127  uint32_t *rk;
128  uint32_t *iw;
129  uint32_t *ctrl;
130  unsigned char buf[256];
131 
132  if( ( (long) input & 15 ) != 0 ||
133  ( (long) output & 15 ) != 0 )
135 
136  rk = ctx->rk;
137  iw = PADLOCK_ALIGN16( buf );
138  memcpy( iw, iv, 16 );
139 
140  ctrl = iw + 4;
141  *ctrl = 0x80 | ctx->nr | ( ( ctx->nr + ( mode ^ 1 ) - 10 ) << 9 );
142 
143  count = ( length + 15 ) >> 4;
144 
145  asm( "pushfl \n\t"
146  "popfl \n\t"
147  "movl %%ebx, %0 \n\t"
148  "movl %2, %%ecx \n\t"
149  "movl %3, %%edx \n\t"
150  "movl %4, %%ebx \n\t"
151  "movl %5, %%esi \n\t"
152  "movl %6, %%edi \n\t"
153  "movl %7, %%eax \n\t"
154  ".byte 0xf3,0x0f,0xa7,0xd0 \n\t"
155  "movl %1, %%ebx \n\t"
156  : "=m" (ebx)
157  : "m" (ebx), "m" (count), "m" (ctrl),
158  "m" (rk), "m" (input), "m" (output), "m" (iw)
159  : "eax", "ecx", "edx", "esi", "edi" );
160 
161  memcpy( iv, iw, 16 );
162 
163  return( 0 );
164 }
165 
166 #endif /* POLARSSL_HAVE_X86 */
167 
168 #endif /* POLARSSL_PADLOCK_C */
AES context structure.
Definition: aes.h:68
Configuration options (set of defines)
#define POLARSSL_ERR_PADLOCK_DATA_MISALIGNED
Input data should be aligned.
Definition: padlock.h:33
uint32_t * rk
Definition: aes.h:71
VIA PadLock ACE for HW encryption/decryption supported by some processors.
int nr
Definition: aes.h:70